As the width of metal lines are further scaled down to submicron and nanometer dimensions, electromigration failure and joule heating may lead to integrated circuit failure. Thus, copper which has lower bulk resistivity, higher melting point, and higher heat conductivity than aluminum is considered more viable for fine line metallization.
Referring to FIGS. 1A and 1B, FIG. 1A shows a top view of a copper line, and FIG. 1B shows a cross sectional view of the copper line of FIG. 1A along line AA. Because copper is not a volatile metal, copper cannot bc easily etched away in a deposition and etching process as typically used for aluminum metallization. Thus, a copper line 10 is typically formed by etching a trench 12 as an opening within a trench insulating layer 14. The trench 12 is then filled with copper.
Referring to FIG. 2, another opening that is filled in copper metallization is a via hole 20. Copper filled within the via hole 20 conductively couples a bottom level copper line 22 to a top level copper line 24. The bottom level copper line 22 is disposed within a bottom insulating layer 26 and below an interlevel insulating layer 28. The top level copper line 24 is disposed above the interlevel insulating layer 28.
As the width of metal lines are scaled down to submicron and nanometer dimensions, openings such as trenches and via holes have a higher aspect ratio (defined as depth of opening to width of opening). However, filling an opening with a higher aspect ratio may lead to formation of a larger quantity and a larger size of voids and seams within the filled opening.
For example, in the prior art, vias and trenches have been filled by using copper sputtering followed by copper reflow. However, copper sputtering is not conformal deposition. Referring to FIG. 3, the top of a via opening 30 may be pinched at the early stage of copper deposition. Such pinching 32 results in formation of a large void 34 within the copper filling the opening 30. Additionally, copper reflow by heating the copper filled within the opening may not be efficient enough to satisfactorily minimize such a void. The presence of voids increases the chance for electromigration failure of copper within the opening 30. Thus, copper sputtering with copper reflow may not be amenable for filling openings with high aspect ratio.
Copper plating processes such as copper electroplating and copper electroless plating are conformal deposition processes, and such conformal deposition processes may reduce the occurrence of a large void such as the large void 34 of FIG. 3. Furthermore, these copper plating processes have the advantages of low tool cost and high throughput. These copper plating processes typically require a seed layer of copper onto which copper is further deposited.
Because these copper plating processes are conformal deposition processes, trench or via openings having high aspect ratio may be filled with less void formation than by using the copper sputtering/reflow process. However, as the aspect ratio of an opening increases to more than 3:1, seams may still form even with copper plating processes. Referring to FIG. 4, a seam 40 is a void which may form near the center of the copper filling a via hole 42, even when a copper plating process is used to fill the via hole 42.
The presence of such a seam leads to a higher risk of electromigration failure of integrated circuits. Nevertheless, filling trench or via openings by copper electroplating and copper electroless plating is desirable for fine line metallization with submicron and nanometer dimensions.